Application specific processors for multimedia applications

Muhammad Rashid, Ludovic Apvrille, Renaud Pacalet

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

6 Scopus citations

Abstract

A well-known challenge during processor design is to obtain best possible results for a typical target application domain by combining flexibility and computational performance. ASIPs (Application Specific Instruction Set Processors) provide a tradeo. between generality of processor (flexibility) and its physical characteristics (computational performance and silicon area). This paper evaluates an ASIP design methodology based on the extension of an existing instruction set and architecture described with LISA 2.0 language. The objective is to accelerate the ASIPs design process by using partially predefined, configurable RISC-like embedded processor cores that can be quickly tuned to given applications by means of ISE (Instruction Set Extension) techniques. A case study demonstrates the methodological approach for the JPEG algorithm and motion estimation encoding algorithm of H.264 encoding standard.

Original languageEnglish
Title of host publicationProceedings - 2008 IEEE 11th International Conference on Computational Science and Engineering, CSE 2008
Pages109-116
Number of pages8
DOIs
StatePublished - 2008
Externally publishedYes
Event2008 IEEE 11th International Conference on Computational Science and Engineering, CSE 2008 - Sao Paulo, SP, Brazil
Duration: 16 Jul 200818 Jul 2008

Publication series

NameProceedings - 2008 IEEE 11th International Conference on Computational Science and Engineering, CSE 2008

Conference

Conference2008 IEEE 11th International Conference on Computational Science and Engineering, CSE 2008
Country/TerritoryBrazil
CitySao Paulo, SP
Period16/07/0818/07/08

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